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Introduction to PCIe xdma IP core (with list) - mingdeyang science and Education (mdy edu. Com)
2022-04-23 01:23:00 【MDYFPGA】
1.PCIE Send and receive data
The purpose of this project is to XC7K325tffg On the platform of pcie Data sending and receiving , rate 8 passageway 2.5GB/s, First, let's take a look at the PCIE The structure of the part :
framework

The function of each module
PCIE Partial structure diagram

This is a PCIE IP nucleus , Mainly used to send data , The sending engine is mainly responsible for sending the data to be sent according to the PCIE Agreements are organized into different types of TLP Data packets , And send it to PCIE IP nucleus ; send out DMA The control module is mainly responsible for DDR3 Convert the data read in to TLP Format , And send it to the sending engine ; The receiving engine is used to receive data from PCIE IP Nuclear reception of different types TLP data , receive DMA The control module is used to realize the transmission flow control of memory read request packet and the conversion of received data bit width ;DMA The status control register module is mainly used to parse the data from PC Commands and configuration of internal registers of the module , And notify the sending engine module 、 The receiving engine module and other modules execute accordingly .

Chart SEQ Chart * ARABIC 1
In chart 1 On the left Rd_fifo Data write cache module , The figure on the right shows the read cache data module .
Fifo: First in, first out . Digital circuit design fifo Actually, it means fifo Memory , It is mainly used for data caching and asynchronous processing ,fifo Memory cache data also follows the principle of first in, first out .Fifo The essence is a RAM, The difference between it and ordinary memory is that there is no external read-write address line , It's very easy to use , But the disadvantage is that you can only write data in sequence , Sequential read and write data .
Signal list

That's all pcie xdma ip Nuclear introduction , Students who want to learn more , You can pay attention to mingdeyang FPGA Official account of science and education
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