当前位置:网站首页>[Opt 31-67] Problem axi_ Interconnect RTL error
[Opt 31-67] Problem axi_ Interconnect RTL error
2022-04-22 07:22:00 【oFFCo】
[Opt 31-67] Problem: A LUT2 cell in the design is missing a connection on input pin I0, which is used by the LUT equation. This pin has either been left unconnected in the design or the connection was removed due to the trimming of unused logic. The LUT cell name is: pl_ddr_axi_interconnect_u/inst/axi_interconnect_inst/crossbar_samd/gen_samd.crossbar_samd/gen_crossbar.gen_slave_slots[1].gen_si_write.splitter_aw_si/FSM_onehot_state[2]_i_2__0.
Adding IP When combining options , choice Global Problem solvable . add to IP Nuclear time selection OOC(Out of context ip) Will lead to the above comprehensive problems .
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