ARM Architecture 2: Processor Core and Assembly Instruction Set

处理器内核

ARM7TDMIExternal interface diagram：

 指令流水线

In order to increase the processing speed of the processor instruction stream,ARM7The series adopts a three-stage assembly line,Multiple operations are allowed at the same time（one executes at the same time,The other is decoded,The other performs addressing to improve efficiency）,rather than sequential operations.注意：pcPoints to the instruction being addressed,而非正在执行的指令.

 最佳流水线

 指令周期CPI=6,6个时钟周期执行了6条指令,All operations are in registers

LDR流水线

 分支流水线

 中断流水线

 ARM9TDMI

ARM9TDMIUsing the Harvard architecture adds an instruction memory interface and a data memory interface,Simultaneous access to instructions and data can be achieved,采用的5级流水线,CPI为1.5,Increased maximum clock frequency

 图中我们可以看到ARM7和ARM9一些区别,ARM7Read registers during the execution phase,而ARM9Registers are read during the decode phase.

ARM10

 下面我们用一张图来总结一下：

 ARM汇编指令集

Conditional execution and flag bits

ARMInstructions can be conditionally executed by adding appropriate condition codes,举个例子

CMP r3,#0

ADDNE r0,r1,r2

判断R3Whether the contents of the register are equal to0,It is not equal to execute the add instruction again r0=r1+r2

We can also do this by adding a suffix Sto affect the flag bit

例如 SUBS

Below I present some condition codes in a diagram：

 ARMData processing instruction machine code format

 31-28位：is the condition code of the instruction

24-21位：指令的操作码

20位：为标志位S

19-16位：RnThe encoding of the first operand register

15-12位：RdThe encoding of the destination register

11-0位：操作数（3-0位：第二操作数R寄存器的编码,5-6位：移位方式,11-7位：移动位数）

注意：Immediate data cannot be shifted left or right！！

Let's show the use of some instructions to deepen the impression：

1.move orderMOV

@ move order

.text        @The start of the assembly text segment

mov r0, #5  @r0=5

mov r1,r0   @ r1=r0

mov r2, #1  @ r2=1

mov r3, r2, LSL #3 @r3=r2<<3

mov r4,r3, LSR #2

mrs r6,cpsr  @将cpsrThe contents of the status register are moved to other registers

@mov r1,#0x10
@msr cpsr,r1  @将R1Register contents are writtencpsr状态寄存器中




.end 		@End of assembly text segment

 我们在keil中进行编译,可以看到E3A00005is the machine code for the first instruction,E为1110is the default condition code,而24-21位为1101刚好是MOV的操作码,而11-0位为5It also happens to be our operand5.

2.逻辑指令 and与,orr或,bic清零

@1.将模式设置为user/system模式
mrs r0, cpsr @将cpsrThe content is removed and placedr0寄存器

and r0, #0xfffffffc @将r0The contents of the registers are ANDed

msr cpsr,r0 @将内容写到cpsr寄存器

@2.orr指令
orr r0,#0x3
mrs r0,cpsr  @可以,但是在usermode is possiblecpsr进行读取操作
msr cpsr,r0  @不可以,usermode is not a privileged mode,不能对cpsrA write operation is performed so it cannot be changed backsvc模式

注意,when we pass the changecpsrstatus register to switch modes,将SVC切换到user模式后,不能在userCorrect in modecpsrA write to the register changes it backsvc状态,But read operations are possible

@3.bic指令将FIQ开启
mrs r0, cpsr
bic r0,#0x40  @将r0中6The number bit is cleared
msr cpsr,r0

bicInstructions can take immediate values ​​as 1的bits位清零,We can change the contents of the status register through this operation,For example, above we will be in the status register6The number bit is cleared to openFIQ的操作.

3.比较指令CMP,TST

@4.tst指令
mrs r0,cpsr
tst r0,#0x20 @测试r0的第5Whether the number is0

@5.cmp指令
cmp r0,#1 @比较r0Whether the contents of the register sum1相等

@6.判断当前状态是否是ARM状态,If yes, switch touser工作模式

mrs r0,cpsr
tst r0,#0x20
biceq r0,#0x3
msreq cpsr,r0

It can be seen that condition codes are added to our clearing and writing operations after the judgment,The corresponding command will be executed only when the corresponding conditions are met

4.跳转指令b,bl

b:Jump to the code of a label

bl：Jump to a label,At the same time record the address of the next instruction toLR寄存器

@1.跳转指令b
.text
@编写代码实现1+2+....+10
mov r0,#1
loop:       @A label for a piece of code
cmp r0,#11
addlt r1,r1,r0 @lt表示条件码
addlt r0,#1
blt loop	@跳转到loop
NOP @空指令
.end

It can be seen that the condition code is added to our code to achieve our execution conditionr0The contents of the register in is less than11When executing addition instructions and jump instructions to achieve the effect of the loop.

@2.跳转指令bl
	.text
main:
	mov r0,#2
	@ bl Jump to a label,At the same time record the address of the next instruction toLR寄存器
	bl func1
while:
	b while
func1:
	mov r6,lr
	cmp r0,#2
	bleq func2
	blne func3
	mov pc,r6 @让cpu到lrFetch an instruction at the specified address,也就是回到bl的下一条指令处
func2:
	add r0,#3
	mov pc,lr
func3:
	sub r0,#1
	mov pc,lr
	.end

blWhen the jump is executed, the address of our next instruction is placedlr中,但是在func1In , we will make another conditional jump that may cause the previous instruction address to be overwritten,So we saved the address to r6寄存器中,这样func1After the execution is completed, it can jump back to the original position to continue execution.

5.load和store

ldr默认读4个字节,ldrb读一个字节,ldrh读两个字节

 下面我们来看看例子：

.text

	main:
		@ldr伪指令,将bufAn invalid immediate value was written to this addressr0中
		ldr r0,=buf
		@ldrb将r0The first byte of data at the address is readr1中
		ldrb r1,[r0]
		
		@ldrb将r0+4The first byte at the address is readr1中
		ldrb r1,[r0,#4]
		
		mov r2,#0x9
		@strb将r2before the data in 1个字节写入r0+2地址上
		@ *（r0+2)=r2
		strb r2,[r0,#2]
		
	main_end:
		NOP
		NOP

.data @The start of the assembly file data section
buf:	@bufEquivalent to the first address of the buffer（数组名）
		@.byte Represents a byte space
	.byte  0x1,0x2,0x3,0x4,0x5
	

.end