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Detailed explanation of basic assembly instructions of x86 architecture

2022-04-23 21:00:00 Descosmos

Assembly instruction

Pseudo instruction

1. .MODEL

.model flat,stdcall

model Pseudo instructions tell the assembler which storage mode to use :32 Bit programs always use planes (flat) Storage mode , It is associated with the protection mode of the processor . keyword stdcall Tell the assembler when calling the program , How to manage the runtime stack .
And then there was .STACK Pseudo instruction , It tells the assembler how many memory bytes should be reserved for the program runtime stack .

2. .STACK

.stack 4096

The number 4096 It may be more than the number of bytes to be used , But for processor memory management , It just corresponds to the size of a memory page . All modern programs use the stack when calling subroutines . First , Used to save the passed parameters ;
secondly , The address of the code used to save the calling function .

3. ENDP

main ENDP

ENDP A pseudo instruction marks the end of a procedure . If the program is named main The process of , be endp You have to use the same name ;

4. END

END main

Last ,END Pseudo instruction marks the end of a program , And reference the program entry ;

Assembly instruction

1. MOV: Copy the source operand to the destination operand

MOV The instruction copies the source operand to the destination operand . As data transfer (data transfer) Instructions , It is used in almost all programs . In its basic format , The first operand is the destination operand , The second operand is the source operand :

MOV destination, sourece

The two operands must be of the same size .
Two operands cannot be memory operands at the same time .
Instruction pointer register (IP、EIP or RIP) Cannot be used as destination operand .

MOV Instructions cannot directly copy smaller operands into larger operands

2. MOVZX and MOVSX

MOVZX Instructions ( All zero expansion and transmission ) Copy the source operand to the destination operand , And put the destination operand 0 Extended to 16 Bit or 32 position . This instruction is only used for unsigned integers , There are three different forms ;

MOVZX reg32,reg/mem8
MOVZX reg32,reg/mem16
MOVZX reg16,reg/mem8

MOVSX Instructions ( Symbol expansion and transmission ) Copy the contents of the source operand to the destination operand , And extend the destination operand symbol to 16 Bit or 32 position . This instruction is only used for signed integers , There are three different forms ;

MOVSX reg32, reg/mem8
MOVSX reg32, reg/mem16
MOVSX reg16, reg/mem8

3. XCHG: Swap the contents of two operands

Three formats :

XCHG reg, reg
XCHG reg, mem
XCHG mem, reg

Two memory operands cannot be exchanged directly

4. INC and DEC

INC( increase ) and DEC( Reduce ) The instructions respectively represent registers plus 1 Sum minus 1:

INC reg/mem
DEC reg/mem

Direct operation on memory is not supported

5. ADD and SUB: Operand addition and subtraction ;

6. NEG: NEG( Not ) An instruction converts an operand to its binary complement , Invert the sign of the operand ;

NEG reg
NEG mem

Negate the destination operand by bit and add 1, You can get the binary complement of this number .

7. ALIGN Pseudo instruction : Align a variable

ALIGN The pseudo instruction aligns a variable to the byte boundary 、 Word boundary 、 Double word boundary or paragraph boundary .

ALIGN bound

ALIGN 4     ; Offset press 4 alignment 

8. JMP Instructions

JMP The instruction jumps unconditionally to the destination address , The address is identified by a code label , And is converted into an offset by the assembler .

JMP destination

When CPU When performing an unconditional transition , The offset of the target address is sent to the instruction pointer register , As a result, Mai continues to execute from the new address .

Infinite loop

top:
    .
    .
    jmp top

9. LOOP Instructions

LOOP Instructions , Officially known as according to ECX Counter cycle , Repeat the block a certain number of times .ECX Automatically become a counter , The count value is subtracted once per cycle 1.
The loop target must be away from the current address counter -128 To +127 Byte range .LOOP There are two steps in the execution of instructions :

  • First step ,ECX reduce 1.
  • The second step , take ECX And 0 Compare .

When ECX It's not equal to 0, Then jump to the symbol content ; if ECX It's not equal to 0, There is no jump .

    ;  Each cycle will AX Add 1, When the cycle ends ,AX=5,ECX=0
    MOV AX, 0
    MOV ECX, 5
L1:
    INC AX
    LOOP L1

10. PUSH,POP Instructions

PUSH The instruction first reduces ESP Value , Then copy the source operand to the stack . The operands are 16 Bit , be ESP reduce 2, The operands are 32 Bit , be ESP reduce 4.

PUSH reg/mem16
PUSH reg/mem32
PUSH inm32

POP Command first ESP Copy the contents of the stack element pointed to to to a 16 Bit or 32 Bit operand , add ESP Value . If the operand is 16 Bit ,ESP Add 2, If the operand is 32 Bit ,ESP Add 4.

POP reg/mem16
POP reg/mem32

11. PUSHFD,POPFD Instructions

PUSHFD Give orders to 32 position EFLAGS The contents of the register are pushed onto the stack , and POPFD The instruction pops the contents of the top unit of the stack to EFLAGS register .

PUSHFD          ; Hold flag register 
POPFD           ; Recovery flag register 

12. PUSHAD, PUSHA, POPAD, POPA

  • PUSHAD Follow the instructions EAX、ECX、EDX、EBX、ESP、EBP、ESI and EDI The order of ( perform PUSHAD Previous value ), Will all 32 Bit general purpose register pushed onto the stack ;POPAD The instruction pops the same registers out of the stack in reverse order .
  • PUSHA The instructions are in order (AX、CX、DX、BX、SP、BP、SI and DI) take 16 Bit general purpose register pushed onto the stack ;POPA The instruction pops the same registers out of the stack in reverse order .

13. CALL and RET Instructions

CALL Instruction calls a procedure , Command the processor to execute from the new memory address . The process uses RET( Return from procedure ) The instruction turns the processor back to the program point where the process is called .
Physically ,CALL Instruction pushes its return address onto the stack , Then copy the address of the called process to the instruction pointer register . When the process is ready to return , its RET The instruction bounces the return address from the stack back to the instruction pointer register .

CALL function_name
RET

14. AND,OR, XOR, NOT Instructions

AND destination, source     ;    Bitwise and operation on two operands 
OR destination, source      ;    Bitwise or on two operands 
XOR destination, source     ;    Bitwise exclusive or of two operands 
NOT reg                     ;    Flip all bits of the operand 

15. TEST Instructions : Bitwise and operation on two operands

TEST And AND The only difference between the instructions is ,TEST The instruction does not modify the target operand .TEST The operands allowed by the instruction are combined with AND The same instruction . When discovering whether a single bit in the operand is set ,TEST Instructions are very useful .

;        test AL Bit of register 0 And place 3 Is it 1
TEST al, 00001001b

When all test bits are 0 when , Zero flag bit ZF Only then 1

16. CMP Instructions : Compare integers

CMP destination, source

Sign a
When the actual subtraction occurs ,CMP The instruction modifies the overflow according to the calculation result 、 Symbol 、 zero 、 carry 、 Auxiliary carry and parity flag bits .

If you compare two unsigned numbers , The relationship between the two operands represented by the zero flag bit and the carry flag bit is shown in the table :

CMP result ZFCF
Destination operands < Source operands 01
Destination operands > Source operands 00
Destination operands = Source operands 10

If you compare two signed numbers , Then the symbol flag bit 、 The relationship between the two operands represented by the zero flag bit and the overflow flag bit is shown in the table :

CMP result Sign a
Destination operands < Source operands SF≠OF
Destination operands > Source operands SF=OF
Destination operands = Source operands ZF=1

generally speaking ,CMP Instruction is combined with jump instruction :

CMP The function of the instruction is to set the flag bit after comparison , The jump instruction jumps by judging the flag bit , achieve if The effect of the statement .

17. Jump instruction

Jump command and CMP Combination of instructions , You can achieve if The effect of the statement .

Mnemonic symbol explain Sign a / register Mnemonic symbol explain Sign a / register
JZ by 0 Jump ZF=1JNO No overflow jump OF=0
JNA Not 0 Jump ZF=0JS Signed jump SF=1
JC Carry jump CF=1JNS Unsigned jump SF=0
JNC No carry jump CF=0JP Even check jump PF=0
JO Overflow jump OF=1JNP Odd check jump PF=0

The comparison of equality

Symbols in the table leftOp and rightOp Respectively means CMP Left... In the command ( Purpose ) Operands and right ( Source ) fuck count ;

Mnemonic symbol explain
JE Equal jump (leftOp=rightOp)
JNE Unequal jump (leftOp M rightOp)
JCXZCX=0 Jump
JECXZECX=0 Jump
JRCXZRCX=0 Jump (64 Bit mode )
mov edx, 0A523h
cmp edx, 0A523h
jne L5                       ; No jump 
je L1                         ; Jump 

Comparison of unsigned numbers

The jump based on unsigned number comparison is shown in the following table . The name of the operand reflects the order of the operands in the expression ( such as leftOp < rightOp);

Mnemonic symbol explain Mnemonic symbol explain
JA More than jump ( if leftOp > rightOp)JB Less than jump ( if leftOp < rightOp)
JNBE Not less than or equal to jump ( And JA identical )JNAE Not greater than or equal to jump ( And JB identical )
JAE Jump greater than or equal to ( if leftOp ≥ rightOp)JBE Less than or equal to jump ( if leftOp ≤ rightOp)
JNB No less than jump ( And JAE identical )JNA No more than jump ( And JBE identical )

Signed number comparison

Mnemonic symbol explain Mnemonic symbol explain
JG More than jump ( if leftOp > rightOp)JL Less than jump ( if leftOp < rightOp)
JNLE Not less than or equal to jump ( And JA identical )JNGE Not greater than or equal to jump ( And JB identical )
JGE Jump greater than or equal to ( if leftOp ≥ rightOp)JLE Less than or equal to jump ( if leftOp ≤ rightOp)
JNL No less than jump ( And JAE identical )JNG No more than jump ( And JLE identical )

18. Shift and cyclic shift instructions

SHR Move right RCL Loop with carry shifts left
SAL Arithmetic shift left RCR Loop with carry shift right
SAR Count right SHLD Double precision left shift
ROL Cyclic shift to the left SHRD Double precision shift right
SHL Move left ROR Cycle moves to the right

displacement

  • Logical shift : The empty space is used 0 fill ;
  • Arithmetic shift : The empty bits are filled with the sign bits of the original data ;

Cyclic shift

Shifting in a cyclic manner is a bit cycle .

When a multibyte integer is cyclically shifted in four bits , The effect is equivalent to moving one hexadecimal bit to the right or left at a time . for example , take 6A4Bh Repeat the cycle to shift four bits left , Finally, it will return to the initial value .

mov ax, 6A4Bh
rol ax, 4              ; AX = A4B6h
rol ax, 4              ; AX = 4B6Ah
rol ax, 4              ; AX = B6A4h
rol ax, 4              ; AX = 6A4Bh

19. MUL Instructions : Unsigned multiplication

The size of the multiplier and the multiplicand must be the same , The product is twice the size of them . All three types can use registers and memory operands , But you can't use immediate numbers :

MUL reg/mem8
MUL reg/meml6
MUL reg/mem32

mov al, 5h
mov bl, 10h
mul bl                    ; AX = 0050h, CF = 0

If the upper half of the product is not zero , be MUL The carry flag and overflow flag will be placed 1. Because the carry flag bit is often used in the arithmetic operation of unsigned numbers , Here we also mainly explain this situation .
for example , When AX Multiply by one 16 Bit operand , The product is stored in DX and AX Register alignment . among , The height of the product 16 Bits are stored in DX, low 16 Bits are stored in AX. If DX It's not zero ,
Then the carry flag position 1, This means that the lower half of the implied destination operand cannot hold the entire product .

64 In bit mode ,MUL Instructions can be used 64 Bit operands . One 64 Bit register or memory operand and RAX Multiply , Produced 128 The bit product is stored in RDX:RAX In the register .

20. IMUL Instructions : Signed multiplication

And MUL The instructions are different ,IMUL I'll keep it The sign of product , The way to achieve this is , Extend the highest sign of the lower half of the product to the upper half .

21. DIV Instructions : Signed Division

DIV reg/mem8
DIV reg/meml6
DIV reg/mem32

The following table shows the divisor 、 Divisor 、 The relationship between quotient and remainder :

Divisor Divisor merchant remainder
AXreg/mem8ALAH
DX:AXreg/mem16AXDX
EDX:EAXreg/mem32EAXEDX

64 In bit mode ,DIV Command with RDX:RAX Make divisor , use 64 Bit register and memory operand as divisor , Commercial deposit in RAX, The remainder is deposited in RDX in .

mov ax, 0083h      ;  Divisor 
mov bl, 2               ;  Divisor 
div bl                     ; AL = 41h, AH = Olh

22. IDICV: Signed Division

Signed division is almost the same as unsigned division , There is only one important difference : Before performing division , The divisor must be sign extended .
Symbol extension refers to copying the highest bit of a number to all the high bits of the variable or register containing the number .

The symbolic extension instruction has :CBW,CWD,CDQ, They correspond to each other : Byte to word , Word to double word , Double word to four word .

23. LEA: Returns the address of the indirect operand

LEA The instruction returns the address of the indirect operand . Because the indirect operand contains one or more registers , Therefore, the offset of these operands is calculated at run time .

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