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Clock frequency and baud rate count for serial communication in FPGA
2022-08-09 13:44:00 【fpga and matlab】
Table of Contents
3. The relationship between the counter frequency division of the clock frequency and the baud rate
1. What is a waveBit rate
The baud rate bandrate refers to the rate of serial communication, that is, how many binary bits can be transmitted per second during serial communication.For example, 9600 bits can be transmitted per second (the time required to transmit one binary bit is 1/9600 second), and the baud rate is 9600.
The communication baud rate of the serial port cannot be set arbitrarily because:
First, both parties must set the same baud rate in advance so that they can communicate successfully. If the sender and receiver communicate according to different baud rates, they will not receive it at all, so the baud rate is best known to everyone.rather than arbitrarily specified.
Second: The commonly used baud rate has been developed for a long time, and a consensus has been formed. The commonly used baud rate is 9600 or 115200.
2.Serial transmission format
The serial transmission format is generally as follows:
It includes a 1bit start bit + 8bit data bit + 1bit stop bit (no parity bit)
3.The relationship between the counter frequency division of the clock frequency and the baud rate
In FPGA, since the clock frequency is generally fixed at 50MHz, 100MHz, in serial communication, the clock frequency needs to be divided so that the clock frequency is approximately equal to the baud rate.
We assume that the clock frequency of the FPGA hardware board is 100Mhz, if the required baud rate is 9600, then the frequency division process of the clock is as follows:
First, calculate the number of continuous clock cycles corresponding to the transmission of 1 bit:
Approximately equal to 10417.
According to the above serial port transmission structure diagram, a complete serial port frame, assuming that the parity check is not considered, requires 10 bits, so the corresponding counter value is:
So, set the counter frequency division value of the clock to 1042.
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